The Effect of Power Islands on Delta-I Noise, Interconnect Noise, and Timing for Wide, On-chip Data-buses

A study is shown of the effect of having breaks in the power distribution on large microprocessor chips. The effect on delta-I noise, interconnect noise, and timing is illustrated through simulation results obtained with representative driver and receiver circuits and guidelines are given on how to minimize the impact of the power islands.

By: A. Deutsch; H. H. Smith; H.-M. Huang; A. Elfadel

Published in: RC23626 in 2005


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