Factorial Analysis and Forecasting of Integrated-Circuit Yield

A detailed cause-and-effect stochastic model is developed to relate the type, size, location, and frequency of observed defects to the final yield in IC manufacturing. The model is estimated on real data sets with a large portion of unclassified defects and uninspected layers, and in presence of clustering of defects. Results of this analysis are used for evaluating kill ratios and effects of different factors, identifying the most dangerous cases and the most probable causes of failures, forecasting the yield, and designing optimal yield-enhancement strategies.

By: Michael Baron, Asya Takken, Emmanuel Yashchin, Mary Lanzerotti

Published in: RC23386 in 2004


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