Implementation of Digital Signal Processing Algorithms for an OFDM-Based Broadband Wireless Local Area Network

This thesis is concerned with the development of a synchronization unit for a Wireless Local Area Network (WLAN) prototyping system compliant with the IEEE 802.11a standard. This unit is part of a digital baseband signal processing board implemented with field-programmable gate-arrays (FPGAs). The physical layer transmission scheme of the standard applies Orthogonal Frequency Division Multiplexing (OFDM) due to its good performance properties in a multipath propagation environment. Before a user data packet can be received, the OFDM receiver has to be adjusted so that it can successfully reconstruct the transmitted packet from the noisy, distorted signal received at the antenna. For this purpose, a preamble with known training symbols is transmitted prior to the user data packet, allowing the receiver to estimate the correct gain setting of the automatic gain control (AGC), the frequency offset between transmit and receive clock, and the radio channel characteristics. For solving these tasks, advanced digital signal processing algorithms have been identified. This thesis deals with their design, implementation and testing. The performance critical digital signal processing algorithms are simulated with a reference MATLAB program to assess their performance in a typical radio environment. Signal quantization effects as well as control loop delays are taken into account. The algorithms are mapped into a register-transfer-level FPGA design using XILINX Foundation Series Tools. Functional simulations are performed to verify the correct operation of the design.

A copy may be requested from Pedro Coronel ( or Wolfgang Schott (

By: Pedro Coronel

Published in: RZ3428 in 2003

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