Optimizing Memory Translation Emulation in Full System Emulators

The emulation speed of a Full System Emulator (FSE)
determines for the most part how useful this FSE can be.
This work quantitatively measures where time is spent
in QEMU, an industrial strength full system emulator,
and confirms that dynamic address translation as one
of the most heavily exercised components in the emulator.
This is even though QEMU implements a Software
Translation Lookaside Buffer (sTLB) to accelerate dynamic
address translation. Consequently, this work proposes
a series of sTLB optimizations that aim at reducing
the address translation emulation overhead. The proposed
techniques optimize address translations as well
as sTLB refills and provide an average performance improvement
of 24.1% over the baseline on a wide range of

By: Xin Tong, Toshihiko Koju, Motohiro Kawahito

Published in: RT0956 in 2014


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