Charge Metering Sampling Circuits and their Applications

Charge metering sampling circuits comprise a new CMOS circuit calss for sampled analog data applications. They avoid some drawbacks of conventional sampling circuits without the use of operational amplifiers. They lightly load their inputs, may be cascaded without buffering to provide analog pipelining, and avoid charge injection errors. Application to linear and nonlinear DACs, particularly for active matrix display data line drivers, is detailed. In the display application, they provide a predetermined nonlinear relationship between digital input and kisplay luminance down to the least significant bit, avoiding compromising color reproduction by the use of a piecewise-linear response.

By: Eugene S. Schlig

Published in: IBM Journal of Research and Development, volume 40, (no 6), pages 631-40 in 1996

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